প্রচ্ছদ

Formal Verification in Automated Manufacturing

In recent decades, discrete-event modelling has been widely utilised to address control engineering problems. Comparing with conventional dynamic system modelling where physical behaviour is explicitly to describe, discrete-event modelling focuses on a more abstract level where logical behaviour is...

সম্পূর্ণ বিবরণ

সংরক্ষণ করুন:
প্রধান লেখক: Tang, Yiheng
বিন্যাস: Online
ভাষা:ইংরেজি
প্রকাশিত: FAU University Press 2025
বিষয়গুলি:
control technology
formale Methode
Automation
formal method
Steuerungstechnik
automation
finite automaton
endlicher Automat
thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TJ Electronics and communications engineering::TJF Electronics engineering::TJFM Automatic control engineering
thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TG Mechanical engineering and materials::TGP Production and industrial engineering::TGPC Computer aided manufacture (CAM)
অনলাইন ব্যবহার করুন:ONIX_20251215T160010_9783961477449_33
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সংক্ষিপ্ত:In recent decades, discrete-event modelling has been widely utilised to address control engineering problems. Comparing with conventional dynamic system modelling where physical behaviour is explicitly to describe, discrete-event modelling focuses on a more abstract level where logical behaviour is of interest. In this dissertation, we focus on the formal verification of the logical closedloop behaviour of control systems. To satisfy safety and/or liveness requirements according to given technical specifications, we exploit the formal semantics of control programmes to represent the entire closed-loop behaviour in a discrete-event model, from which the properties of interest can be formally verified through an efficient method.

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