Miniaturized Transistors
What is the future of CMOS? Sustaining increased transistor densities along the path of Moore's Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design makeovers...
Na minha lista:
| Main Authors: | , |
|---|---|
| Formato: | Online |
| Idioma: | inglês |
| Publicado em: |
MDPI - Multidisciplinary Digital Publishing Institute
2021
|
| Assuntos: | |
| Acesso em linha: | 33701 |
| Tags: |
Sem tags, seja o primeiro a adicionar uma tag!
|
| _version_ | 1869531296086097920 |
|---|---|
| author | Grasser, Tibor Filipovic, Lado |
| author_browse | Filipovic, Lado Grasser, Tibor |
| author_facet | Grasser, Tibor Filipovic, Lado |
| author_sort | Grasser, Tibor |
| collection | Directory of Open Access Books |
| description | What is the future of CMOS? Sustaining increased transistor densities along the path of Moore's Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design makeovers; from planar transistors of ten years ago, technological advancements have accelerated to today's FinFETs, which hardly resemble their bulky ancestors. FinFETs could potentially take us to the 5-nm node, but what comes after it? From gate-all-around devices to single electron transistors and two-dimensional semiconductors, a torrent of research is being carried out in order to design the next transistor generation, engineer the optimal materials, improve the fabrication technology, and properly model future devices. We invite insight from investigators and scientists in the field to showcase their work in this Special Issue with research papers, short communications, and review articles that focus on trends in micro- and nanotechnology from fundamental research to applications. |
| format | Online |
| id | doab-20.500.12854ir-53550 |
| institution | Directory of Open Access Books |
| language | eng |
| publishDate | 2021 |
| publishDateRange | 2021 |
| publishDateSort | 2021 |
| publisher | MDPI - Multidisciplinary Digital Publishing Institute |
| publisherStr | MDPI - Multidisciplinary Digital Publishing Institute |
| record_format | ojs |
| spelling | doab-20.500.12854ir-535502024-04-11T15:10:41Z Miniaturized Transistors Grasser, Tibor Filipovic, Lado TA1-2040 T1-995 MOSFET n/a total ionizing dose (TID) low power consumption process simulation two-dimensional material negative-capacitance power consumption technology computer aided design (TCAD) thin-film transistors (TFTs) band-to-band tunneling (BTBT) nanowires inversion channel metal oxide semiconductor field effect transistor (MOSFET) spike-timing-dependent plasticity (STDP) field effect transistor segregation systematic variations Sentaurus TCAD indium selenide nanosheets technology computer-aided design (TCAD) high-? dielectric subthreshold bias range statistical variations fin field effect transistor (FinFET) compact models non-equilibrium Green’s function etching simulation highly miniaturized transistor structure compact model silicon nanowire surface potential Silicon-Germanium source/drain (SiGe S/D) nanowire plasma-aided molecular beam epitaxy (MBE) phonon scattering mobility silicon-on-insulator drain engineered device simulation variability semi-floating gate synaptic transistor neuromorphic system theoretical model CMOS ferroelectrics tunnel field-effect transistor (TFET) SiGe metal gate granularity buried channel ON-state bulk NMOS devices ambipolar piezoelectrics tunnel field effect transistor (TFET) FinFETs polarization field-effect transistor line edge roughness random discrete dopants radiation hardened by design (RHBD) low energy flux calculation doping incorporation low voltage topography simulation MOS devices low-frequency noise high-k layout level set process variations subthreshold metal gate stack electrostatic discharge (ESD) thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TB Technology: general issues::TBX History of engineering and technology What is the future of CMOS? Sustaining increased transistor densities along the path of Moore's Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design makeovers; from planar transistors of ten years ago, technological advancements have accelerated to today's FinFETs, which hardly resemble their bulky ancestors. FinFETs could potentially take us to the 5-nm node, but what comes after it? From gate-all-around devices to single electron transistors and two-dimensional semiconductors, a torrent of research is being carried out in order to design the next transistor generation, engineer the optimal materials, improve the fabrication technology, and properly model future devices. We invite insight from investigators and scientists in the field to showcase their work in this Special Issue with research papers, short communications, and review articles that focus on trends in micro- and nanotechnology from fundamental research to applications. 2021-02-11T19:44:34Z 2021-02-11T19:44:34Z 2019-06-26 08:44:06 2019 book 33701 9783039210107 9783039210114 https://directory.doabooks.org/handle/20.500.12854/53550 eng image/png Attribution-NonCommercial-NoDerivatives 4.0 International https://mdpi.com/books/pdfview/book/1370 MDPI - Multidisciplinary Digital Publishing Institute 10.3390/books978-3-03921-011-4 10.3390/books978-3-03921-011-4 46cabcaa-dd94-4bfe-87b4-55023c1b36d0 9783039210107 9783039210114 202 open access |
| spellingShingle | TA1-2040 T1-995 MOSFET n/a total ionizing dose (TID) low power consumption process simulation two-dimensional material negative-capacitance power consumption technology computer aided design (TCAD) thin-film transistors (TFTs) band-to-band tunneling (BTBT) nanowires inversion channel metal oxide semiconductor field effect transistor (MOSFET) spike-timing-dependent plasticity (STDP) field effect transistor segregation systematic variations Sentaurus TCAD indium selenide nanosheets technology computer-aided design (TCAD) high-? dielectric subthreshold bias range statistical variations fin field effect transistor (FinFET) compact models non-equilibrium Green’s function etching simulation highly miniaturized transistor structure compact model silicon nanowire surface potential Silicon-Germanium source/drain (SiGe S/D) nanowire plasma-aided molecular beam epitaxy (MBE) phonon scattering mobility silicon-on-insulator drain engineered device simulation variability semi-floating gate synaptic transistor neuromorphic system theoretical model CMOS ferroelectrics tunnel field-effect transistor (TFET) SiGe metal gate granularity buried channel ON-state bulk NMOS devices ambipolar piezoelectrics tunnel field effect transistor (TFET) FinFETs polarization field-effect transistor line edge roughness random discrete dopants radiation hardened by design (RHBD) low energy flux calculation doping incorporation low voltage topography simulation MOS devices low-frequency noise high-k layout level set process variations subthreshold metal gate stack electrostatic discharge (ESD) thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TB Technology: general issues::TBX History of engineering and technology Grasser, Tibor Filipovic, Lado Miniaturized Transistors |
| title | Miniaturized Transistors |
| title_full | Miniaturized Transistors |
| title_fullStr | Miniaturized Transistors |
| title_full_unstemmed | Miniaturized Transistors |
| title_short | Miniaturized Transistors |
| title_sort | miniaturized transistors |
| topic | TA1-2040 T1-995 MOSFET n/a total ionizing dose (TID) low power consumption process simulation two-dimensional material negative-capacitance power consumption technology computer aided design (TCAD) thin-film transistors (TFTs) band-to-band tunneling (BTBT) nanowires inversion channel metal oxide semiconductor field effect transistor (MOSFET) spike-timing-dependent plasticity (STDP) field effect transistor segregation systematic variations Sentaurus TCAD indium selenide nanosheets technology computer-aided design (TCAD) high-? dielectric subthreshold bias range statistical variations fin field effect transistor (FinFET) compact models non-equilibrium Green’s function etching simulation highly miniaturized transistor structure compact model silicon nanowire surface potential Silicon-Germanium source/drain (SiGe S/D) nanowire plasma-aided molecular beam epitaxy (MBE) phonon scattering mobility silicon-on-insulator drain engineered device simulation variability semi-floating gate synaptic transistor neuromorphic system theoretical model CMOS ferroelectrics tunnel field-effect transistor (TFET) SiGe metal gate granularity buried channel ON-state bulk NMOS devices ambipolar piezoelectrics tunnel field effect transistor (TFET) FinFETs polarization field-effect transistor line edge roughness random discrete dopants radiation hardened by design (RHBD) low energy flux calculation doping incorporation low voltage topography simulation MOS devices low-frequency noise high-k layout level set process variations subthreshold metal gate stack electrostatic discharge (ESD) thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TB Technology: general issues::TBX History of engineering and technology |
| topic_facet | TA1-2040 T1-995 MOSFET n/a total ionizing dose (TID) low power consumption process simulation two-dimensional material negative-capacitance power consumption technology computer aided design (TCAD) thin-film transistors (TFTs) band-to-band tunneling (BTBT) nanowires inversion channel metal oxide semiconductor field effect transistor (MOSFET) spike-timing-dependent plasticity (STDP) field effect transistor segregation systematic variations Sentaurus TCAD indium selenide nanosheets technology computer-aided design (TCAD) high-? dielectric subthreshold bias range statistical variations fin field effect transistor (FinFET) compact models non-equilibrium Green’s function etching simulation highly miniaturized transistor structure compact model silicon nanowire surface potential Silicon-Germanium source/drain (SiGe S/D) nanowire plasma-aided molecular beam epitaxy (MBE) phonon scattering mobility silicon-on-insulator drain engineered device simulation variability semi-floating gate synaptic transistor neuromorphic system theoretical model CMOS ferroelectrics tunnel field-effect transistor (TFET) SiGe metal gate granularity buried channel ON-state bulk NMOS devices ambipolar piezoelectrics tunnel field effect transistor (TFET) FinFETs polarization field-effect transistor line edge roughness random discrete dopants radiation hardened by design (RHBD) low energy flux calculation doping incorporation low voltage topography simulation MOS devices low-frequency noise high-k layout level set process variations subthreshold metal gate stack electrostatic discharge (ESD) thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TB Technology: general issues::TBX History of engineering and technology |
| url | 33701 |
| work_keys_str_mv | AT grassertibor miniaturizedtransistors AT filipoviclado miniaturizedtransistors |