InP DHBT-based clock and data recovery circuits for ultra-high-speed optical data links

In this work, up to 80 Gbit/s monolithically integrated clock and data recovery (CDR) circuits with 1:2 demultiplexer are developed. The integrated circuits are manufactured using an InP double heterojunction bipolar transistor (DHBT) technology, featuring cut-off frequency values of more than 250 G...

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Bibliografiske detaljer
Hovedforfatter: Makon, Robert Elvis
Format: Online
Sprog:engelsk
Udgivet: KIT Scientific Publishing 2021
Fag:
Online adgang:34682
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