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InP DHBT-based clock and data recovery circuits for ultra-high-speed optical data links

In this work, up to 80 Gbit/s monolithically integrated clock and data recovery (CDR) circuits with 1:2 demultiplexer are developed. The integrated circuits are manufactured using an InP double heterojunction bipolar transistor (DHBT) technology, featuring cut-off frequency values of more than 250 G...

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Wedi'i Gadw mewn:
Prif Awdur: Makon, Robert Elvis
Fformat: Online
Iaith:Saesneg
Cyhoeddwyd: KIT Scientific Publishing 2021
Pynciau:
T1-995
InP DHBT
Phase detector
Phase-locked loop
Optical link
Clock and data recovery
thema EDItEUR::T Technology, Engineering, Agriculture, Industrial processes::TB Technology: general issues
Mynediad Ar-lein:34682
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Crynodeb:In this work, up to 80 Gbit/s monolithically integrated clock and data recovery (CDR) circuits with 1:2 demultiplexer are developed. The integrated circuits are manufactured using an InP double heterojunction bipolar transistor (DHBT) technology, featuring cut-off frequency values of more than 250 GHz. The outstanding and (to some extent) record achievements throughout the work make an essential contribution to the development of future optical telecommunication networks operating at 80 Gbit/s.

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